High Speed and Flexible Configuration Neural Network
Main Article Content
Abstract
The research presents the neural cell design with supervised learning method adapting to many algorithms which require high speed and accuracy in this paper. Based on the supervised learning method and real neural structure, we built an artificial neural architecture which can process real numbers. This architecture easily increases the speed by expanding the floor numbers modeled on pipeline structure. To ensure high speed and accuracy we try to optimize a part of a processing and training architecture. The architecture easily extends and controls many applications by configuring network parameters on the FPGA. The research group's results are very positive when the the network has 30 cells with 89379 LUTs and 92761 registers based on 28nm technology. Operating frequency can be reached to 214 Mhz.
Keywords
Artificial Neural Network, Floating Point Processing, Pipeline
Article Details
References
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[3] Eriko Nurvitadhi, Jaewoong Sim, David Sheffield, Asit Mishra, Srivatsan Krishnan, Debbie Marr "Accelerating Recurrent Neural Networks in Analytics Servers: Comparison of FPGA, CPU, GPU, and ASIC" 2016 26th International Conference on Field Programmable Logic and Applications (FPL) Lausanne, Switzerland
[4] Martin T. Hagan, Howard B. Demuth, Mark Hudson Beale, Orlando De Jesús Book "Neural network design" - 2nd edtion, 2002.
[5] "IEEE Standard for Floating-Point Arithmetic" September 03,2015 at 19:44:10 UTC from IEEE Xplore
[6] Mr Prashant D. Deotale ProfLalit Dole - "Design of FPGA Based General Purpose Neural Network" International Conference on Communication Information and Embedded Systems (ICICES2014) - Chennai, India
[7] Yijin Guan, Zhihang Yuan, Guangyu Sunl, Jason Cong2- "FPGA-based Accelerator for Long Short-Term Memory Recurrent Neural Networks" - Design Automation Conference (ASP-DAC), 2017 22nd Asia and South Pacific - Chiba, Japan
[8] Tuan Linh Dang. Yukinobu Hoshino - "An-FPGA based classification system by using a neural network and an improved particle swarm optimization algorithm" 2016 Joint 8th International Conference on Soft Computing and Intelligent Systems (SCIS) and 17th International Symposium on Advanced Intelligent Systems (ISIS) - Sapporo, Japan
[9] Ravikant G. Biradar, Abhishek Chatterjee, Prabhakar Mishra, Koshy George - "FPGA Implementation of a Multilayer Artificial Neural Network using System-on-Chip Design Methodology" 2015 International Conference on Cognitive Computing and Information Processing(CCIP) - Noida, India
[10] Ismail Koyuncu - "Design and Implementation of High Speed Artificial Neural Network Based Sprott 94 S System on FPGA" - International Journal of Intelligent Systems and Applications in Engineering Advanced Technology & Science 2013
[11] Sahin, Koyuncu "Design and Implementation of Neural Networks Neurons with RadBas, LogSig, and TanSig Activation Functions on FPGA" - JOURNAL ELEKTRONIKA IR ELELTROTECHNΙΚΑ 2012.
[12] Djalal Eddine KHODJA, Aissa KHELDOUN, Larbi REFOUFI "Sigmoid Function Approximation for ANN Implementation in FPGA Devices" Recent Researches in Circuits, Systems. Electronics, Control & Signal Processing 2010.
[13] Etienne Dumesnil, Philippe-Olivier Beaulieu and Mounir Boukadoum "Robotic Implementation of Classical and Operant Conditioning as a Single STDP Learning Process" 2016 International Joint Conference on Neural Networks (IJCNN)- Vancouver, BC, Canada
[14] Raghid Morcel, Mazen Ezzeddine, and Haitham Akkary "FPGA-based Accelerator for Deep Convolutional Neural Networks for the SPARK Environment" 2016 IEEE International Conference on Smart Cloud (SmartCloud) - New York, NY, USA
[15] Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui - "A Memory-Efficient Accelerator for Compressing Deep Neural Networks with Blocked Hashing Techniques" - 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) - Chiba, Japan
[16] Wenlai Zhao, Haohuan Fu, Wayne Luk, Teng Yu, Shaojun Wang, Bo Feng, Yuchun Ma, Guangwen Yang "F-CNN: An FPGA-based Framework for Training Convolutional Neural Networks" 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP) - London, UK
[17] Nusirwan Anwar bin Abdul Rahman, Kit Chong Wei, John See "RGB-H-CbCr Skin Colour Model for Human Face Detection"- Faculty of Information Technology, Multimedia University
[18] Jorge C. Romero-Aragon, Edgar N. Sanchez, Alma Y Alanis "FPGA Neural Identifer for Insulin-Glucose Dynamics"- World Automation Congress (WAC), 2014-Waikoloa, HI, USA.